verilog - Xilinx EOF Error -


i trying synthesize ip core opencores.org website written in verilog language ambercpu. project implementation of version of arm instruction set architecture. however, when gradually add source files project tree , check whether there problem or not, @ point @ specific header file errors. error reads "expecting 'eof', found 'localparam'" , file starts below

// e.g. 24 32mbytes, 26 128mbytes localparam main_msb             = 26;   // e.g. 13 4k words localparam boot_msb             = 13;

...

the file not included in "automatic includes" neither defined "global header".

so question how can solve problem. related kind of settings of xilinx ise not realize yet or related character encoding?


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